Sipeed Tang Nano 1K Minimalist FPGA Development Board (Gowin GW1NZ-1)

Specifications

• FPGA Core: Gowin GW1NZ-LV1 (QN48C6/I5)

• Clock Speed: 27MHz Onboard Crystal

• Video Output: RGB LCD Connector

• Programming: Onboard USB-JTAG Circuit via USB-C

• User I/O: 2x Tactile Buttons (KEY_A, KEY_B), 1x RGB LED

• GPIO Logic Level: Bank 0 and Bank 1 operate at 3.3V (Vio=3.3V)

• Dimensions: 58.34mm x 21.29mm

• Pin Pitch: 2.54mm

Downloads & Links:

• Documentation

Key Applications and Projects

• Introductory Digital Logic Design: Perfect for university students or self-learners replacing discrete TTL logic chips with a single programmable fabric to build adders, multiplexers, and complex state machines.

• Custom Display Controllers: Utilizing the 40-pin RGB LCD connector to write Verilog code that drives a screen from scratch, teaching the fundamentals of video timing and pixel generation.

• Hardware Interface Bridging: Acting as a high-speed, zero-latency translator between incompatible microcontrollers by implementing custom I2C, SPI, or UART protocols directly in hardware.

Unlock New Capabilities (Project Evolution) The Hardware-Driven Status Display: Don't rely on slow microcontrollers to push pixels! By attaching a standard 4.3-inch RGB LCD to the Tang Nano 1K's 40-pin connector, you can write a custom display controller purely in Verilog or VHDL. Interface the FPGA with an ESP32 via a custom high-speed SPI bridge, and use the FPGA's parallel processing to instantly render complex graphics and live smart-home sensor data without any screen tearing—creating a professional-grade, hardware-accelerated dashboard!

PACKAGE INCLUDED

• 1 x Sipeed Tang Nano 1K FPGA Board

• 2 x Male Header Pin Strips

FREQUENTLY ASKED QUESTIONS (FAQ)

1. What FPGA chip does this board use? The board uses the Gowin GW1NZ-LV1 FPGA, specifically the QN48C6/I5 variant.

2. Do I need to buy a separate JTAG programmer? No, the board features a built-in USB-JTAG circuit. It provides programming capabilities directly through the USB Type-C port.

3. What are the exact dimensions of the PCB? The board measures 58.34mm in length and 21.29mm in width.

4. Is this board breadboard compatible? Yes, the pin headers use a standard 2.54mm pitch. The distance between the header rows is 17.78mm.

5. Are the header pins pre-soldered? No, the board comes with loose male header pin strips.

6. What are the two buttons on the top used for? The board features two tactile push buttons labeled A and B. These map to KEY_A and KEY_B in your digital logic design.

7. Does the board have user LEDs? Yes, there is an onboard RGB LED available for visual debugging.

8. What is the large white connector on the top? That is an RGB LCD Connector designed for attaching parallel RGB LCD screens.

9. Does the board support external PSRAM? The board features unpopulated pads designated for a PSRAM chip, but it is not populated by default on this model.

10. What is the logic voltage of the GPIO pins? The IO banks (BANK0 and BANK1) operate at a 3.3V logic level (Vio=3.3V).

11. How is the board powered? It is primarily powered via the USB Type-C port. The board also exposes 5V and 3V3 power pins on the headers.

12. What is the clock speed of the board? It features an onboard 27MHz crystal oscillator (XTAL_27M).

13. How do I identify the JTAG pins if I want to use an external programmer? The bottom of the board features clear silkscreen labeling for the JTAG pins, including TCK, TDI, TDO, and TMS.

14. What does the LDO component do? The onboard LDO (Low Dropout Regulator) safely steps down the incoming 5V USB power to the lower voltages required by the FPGA chip.

15. What software is required to program this board? You will need to download and install the official Gowin EDA software suite to write, synthesize, and upload your Verilog or VHDL code to the FPGA.

16. Does the package include a USB cable? No, the standard package includes the Tang Nano 1K board and the male header pins. You will need to provide your own USB Type-C data cable.

17. Can this board run a Linux operating system? No. With only 1K LUTs and no external DDR RAM, this board is designed for fundamental digital logic and cannot run heavy operating systems like Linux.

18. What is the purpose of the small chip near the USB port? That chip manages the USB-to-JTAG translation, allowing your computer to program the FPGA directly over USB without requiring an expensive, external JTAG debugging probe.

19. Can I solder this board directly to another custom PCB? While it comes with standard through-hole headers, the board's compact size and pin layout make it very easy to integrate as a System-on-Module (SOM) onto your own carrier boards.

20. Can this board run a RISC-V softcore processor? Due to the highly constrained 1K logic capacity, it cannot run standard softcores easily. While an extremely stripped-down PicoRV32 might barely fit, this board is much better suited for learning pure digital logic, whereas the Tang Nano 9K or 20K are recommended for softcore processor development.