Description:

Sipeed Tang Nano FPGA Board is powered by a GW1N-1 FPGA and carries a low-power GW1N-1-LV core chip. The GW1N-1-LV chip offers the 1152 LUT4 which contains 4 addresses for RAM and 864 FF (Flip-Flop). The Tang Nano Board has a compact small size and due to this, a DSP module is not included.

The main features for the Tang Nano FPGA Board include 34 rich I/O PINs and a USB Type-C interface. This allows for the power supply and downloading code. Additionally, the JTAG downloader supports a USB cable, enabling code to be downloaded without an extra downloader outside the board. A 40 Pin FPC LCD carrier allows a 40 PIN RGB LCD Screen to be equipped on the board.

Specifications:

FPGA chip GWIN-1-LV: LUT4 1152, Flip-Flop 864, BSRAM (bits) 72K, USER Flash (bits) 96K, PLLs+DLLs 1+0, Core voltage 1.2V
Download method: Simply plug in the USB cable and download it via the onboard downloader
Power circuit-each bank occupies a separate LDO power chip (except BANK0/3), adjust the I/O level of BANK1 and BANK2 by replacing the LDO chip by yourself
40P FPC LCD carrier-standard 40 RGB LCD interface. On-board screen backlight driver circuit (default normally open, EN pin can be connected to FPGA)

34 I/O ports and multiple power pins on both sides, both sides of the pins can be directly inserted into the breadboard
Onboard PSRAM chip capacity 64Mbits at 3.3V
Power supply and download interface: USB-Type-C interface
Onboard small size RGB LED
2 3x4mm buttons onboard
Onboard 24Mhz crystal oscillator (started by CH552)
External supply voltage demand of 5.0V±0.2V
External supply current demand of >[email protected]
Temperature rise of <30K
Range of working temperature at -30°C to +50°C

Applications: